Four transistors in a H-bridge circuit are often used to provide bi-directional drive to load devices, including motors or transducers. Further, totem-pole H-bridge circuits, which use four same-type output transistors, may be preferable in many applications because of the characteristics of available output device types. Totem-pole H-bridge circuits may be particularly advantageous for output devices constructed in integrated circuit form, where process and technology constraints usually preclude creating complementary devices with similar performance characteristics. Additionally, a single pair of transistors, coupled in series, may be used to provide single-ended output power to a load.
In an H-bridge circuit, two transistors are coupled in series between a direct current (DC) voltage source and ground. Thus, if both transistors are turned on simultaneously, a potentially catastrophic shoot-through condition exists in which a short circuit current through the transistors could burn out the transistors or damage other circuit components. To eliminate the potential for shoot-through current in conventional switching circuits, dead time is added to the gate driver signals, provided to the two transistors, to ensure that one of the transistors is completely turned off before the other transistor is turned on. However, the presence of dead time can add a significant amount of undesired non-linearity and harmonic distortion to the pulse width modulated (PWM) output waveform.
Many different methods for compensating for dead time have been proposed, typically by compensating for the effects of dead time indirectly using appropriate control methods to modify the PWM signal timing. Measured phase current polarity information is often required to carry out these compensation algorithms. The very fast (sub-microsecond) time scale for switching in H-bridge circuits, combined with practical difficulties associated with zero-crossing detection errors, has made it difficult to satisfactorily achieve dead time compensation under all conditions, and the added complexity of such approaches also increases the total cost of the circuit.
Various circuits have been proposed for preventing shoot-through currents by effectively sensing current flow through the transistors and ensuring the turn-off of a conducting transistor before the other transistor is turned on. Such circuits require significant additional components, with significant added cost, or still require delays between turn-off and turn-on of the transistors with corresponding dead time in the PWM waveforms.
U.S. Pat. No. 6,909,620 to Park et al. teaches a switching circuit, which provides a turn-on delay of the upper transistors, but requires an extra diode or switch capable of handling a full load current in series with the lower transistors. Park et al.'s design adds extra cost and complexity to the design of the switching circuit and reduces efficiency because of the extra power dissipated by the added sensing element(s).
Accordingly, a need still exists for a simple high-speed switching circuit, which avoids shoot-through currents without excessive dead time.
For simplicity and clarity of illustration, the drawing figures illustrate the general manner of construction, and descriptions and details of well-known features and techniques may be omitted to avoid unnecessarily obscuring the invention. Additionally, elements in the drawing figures are not necessarily drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help improve understanding of embodiments of the present invention. The same reference numerals in different figures denote the same elements.
The terms “first,” “second,” “third,” “fourth,” and the like in the description and in the claims, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the invention described herein are, for example, capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms “comprise,” “include,” “have,” and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements is not necessarily limited to those elements, but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. The term “coupled,” as used herein, is defined as directly or indirectly connected in an electrical or non-electrical manner.